Eddy DK Programmer Guide
J1 Pin Description
UART #2 Clear to Send Signal
Disabled.
Data Flash connected with SPI0 is used for Eddy-CPU v2.1/v2.5. For
this reason SPI0 and MCDB0, MCDB3, and MCCDB signals,
multiplexing, cannot be used, thus Multimedia Card Slot B is disabled.
UART #2 Request to Send Signal
Peripheral B : SPI1_NPCS1
SPI1(Serial Peripheral Interface) Peripheral Chip Select 1
Multimedia Card Slot B Data
Peripheral B : SPI1_NPCS2
SPI1(Serial Peripheral Interface) Peripheral Chip Select 2
Ethernet(WAN) Force 100Mbit/sec.
Ready signal. Output signal for CPU operation status
Peripheral B : SPI1_NPCS2
SPI1(Serial Peripheral Interface) Peripheral Chip Select 2
Eddy-DK v2,1 : nRESET#(IN)
Polling Input signal continually from External Reset key, implement as
below with checking the constant time of "Low."
Less than 5 seconds: General reset function.
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